1. RS and SR Latches
RS and SR are memory blocks. One signal turns the output on; another turns it off:
Set → store TRUE
Reset → clear to FALSE
Q → current stored stateA latch is useful when the output must retain its state after a brief input pulse.
2. Why a Latch Is Needed
Without memory, an output often follows the input: press a button and it turns on; release the button and it turns off.
A latch remembers the command:
Press Set → Q = TRUE
Release Set → Q stays TRUE
Press Reset → Q = FALSE3. Inputs and Outputs
| Name | Type | Purpose |
|---|---|---|
| S | Input | Set the state to TRUE |
| R | Input | Reset the state to FALSE |
| Q | Output | Stored state |
Programming environments may use Set, Reset, S, or R; the principle is the same.
4. Example: Motor Start and Stop
| Signal | Purpose |
|---|---|
| Start_Button | Set Q to TRUE |
| Stop_Button | Reset Q to FALSE |
| Motor_Run | Latch output Q |
[Start_Button] ──> S ┌────┐
│ RS │ Q ──> [Motor_Run]
[Stop_Button] ───> R └────┘Start_Button sets Q; Stop_Button resets it.
5. State Table
| S | R | Q after the scan |
|---|---|---|
| FALSE | FALSE | Previous state retained |
| TRUE | FALSE | TRUE |
| FALSE | TRUE | FALSE |
| TRUE | TRUE | Depends on RS or SR priority |
The simultaneous TRUE case is the important difference between the two blocks.
6. RS versus SR
| Type | Priority | Result when S and R are TRUE |
|---|---|---|
| RS | Reset | Q = FALSE |
| SR | Set | Q = TRUE |
For mechanism control, reset priority is often preferable so a stop or fault-reset condition overrides a start command.
7. Reset-Priority RS
S = TRUE, R = FALSE → Q = TRUE
R = TRUE → Q = FALSE
S = FALSE, R = FALSE → Q retainedEven when Start and Stop are active together, Reset clears the output.
8. Set-Priority SR
SR gives priority to Set. When S and R are both TRUE, Q is TRUE. This is useful for some logic tasks, but requires care when controlling equipment starts.
9. Where Latches Are Used
- retaining a start command;
- holding an alarm until operator reset;
- remembering a selected mode;
- retaining a sequence step;
- storing a cycle-running state;
- recording a sensor event.
10. Simulator Practice
Open the RS/SR lesson example and start the simulation.
In the supplied diagram, Input 1 resets both blocks, Input 2 sets SR, and Input 3 sets RS. Output 1 shows SR; Output 2 shows RS.
- 1. Leave Input 1 FALSE and activate Inputs 2 and 3 briefly.
- 2. Return Inputs 2 and 3 to FALSE; both outputs remain TRUE.
- 3. Activate Input 1; both outputs become FALSE.
- 4. With Input 1 still TRUE, activate Inputs 2 and 3. Output 1 becomes TRUE because SR has Set priority; Output 2 remains FALSE because RS has Reset priority.
The exercise shows how the blocks retain state between scans and apply different priorities.
11. Key Points
RS and SR store Boolean state: S sets Q, R resets Q, and Q carries the retained result. Always account for priority when both commands are active, especially for start and stop logic.
Practice block
Open the related example in the editor, run the simulation, and repeat the exercise from the article. The JSON is also available as a direct download.